A fault tree diagram is used to conduct fault tree analysis (or FTA). Fault tree analysis helps determine the cause of failure or test the reliability of a system by stepping through a series of events logically.
Steps to Creating a Fault Tree Diagram
- Define the undesired event: the primary fault or failure being analyzed
- Deduce the event's immediate causes
- Keep stepping back through events until the most basic causes are identified
- Construct a fault tree diagram
- Evaluate your fault tree analysis
Benefits of Fault Trees
A fault tree creates a visual record of a system that shows the logical relationships between events and causes lead that lead to failure. It helps others quickly understand the results of your analysis and pinpoint weaknesses in the design and identify errors.
A fault tree diagram will help prioritize issues to fix that contribute to a failure.
In many ways, the fault tree diagram creates the foundation for any further analysis and evaluation.
For example, when changes or upgrades are made to the system, you already have a set of steps to evaluate for possible effects and changes.
You can use a fault tree diagram to help you design quality tests and maintenance procedures.
How Are Fault Tree Diagrams Used
Fault tree analysis is useful in engineering, especially in industries where failure can have huge consequences such as nuclear power or aeronautics. However, fault tree analysis can also be used during software development to debug complex systems.
Fault Tree Diagram Symbols and Notations
There are two basic types of fault tree diagram notations: events and logic gates. The primary or basic failure event is usually denoted with a circle. An external event is usually depicted with a symbol that looks like a house. It's an event that is normal and guaranteed or expected to occur. Undeveloped event usually denotes something that needs no further breakdown or investigation or an event for which no further analysis is possible because of a lack of information. A conditioning event is a restriction on a logic gate in the diagram. These gate symbols describe the Boolean relationship between outcomes.
Gate symbols can be the following:
- OR gate - An event occurs as long as at least one of the input events takes place
- AND gate - An event occurs only if all input conditions are met
- Exclusive OR gate - An event occurs only if one of the input conditions is met, not if all conditions are met
- Priority AND gate - This is probably the most restrictive scenario when an event occurs only after a specific sequence of conditions
- Inhibit gate - An event will only occur if all input events take place as well as whatever is described in a conditional event